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  • meacupla - Wednesday, March 6, 2024 - link

    I am eagerly awaiting for 3GB density to arrive.
    128bit memory bus GPUs don't have enough VRAM with 8GB, but they also don't have enough raster to fully utilize 16GB. Give them 3GB chips and they will have 12GB.
    The same story with 192bit memory bus. Not enough VRAM with 12GB, but they will never have enough raster for 24GB. If they had 18GB from 6x3GB, that'd be more than enough.
    Reply
  • ET - Thursday, March 7, 2024 - link

    I agree about the notion of 3GB helping in this respect, though I the talk about "enough raster" seems irrelevant. If this arrives it will be with next gen cards, which will have higher bandwidth (thanks to GDDR7) and higher performance. So higher density RAM (or clamshell) will pretty much be needed to provide a decent amount of RAM to what will be low end cards which are equivalent to current mid-range ones, or mid range equivalent to high end. Reply
  • Threska - Wednesday, March 6, 2024 - link

    "It goes without saying that all parties are keen to getting to use or sell GDDR7 respectively, given the memory capacity and bandwidth improvements it will bring – and especially in this era where anything aimed at the AI market is selling like hotcakes."

    Combined with this there should be more bang for the buck.

    https://youtu.be/nP5pztB6wPU
    Reply
  • NextGen_Gamer - Thursday, March 7, 2024 - link

    I know AMD has confirmed that RDNA-4 is on track still for 2024 release, and it seems a given it will support GDDR7, but has anyone seen info on NVIDIA's next cards? I know the B100/AI version of "Blackwell" is 100% releasing this year (as NV has told investors on more than one occasion), but I don't think I've heard about the GPU/consumer versions as much. Reply
  • meacupla - Thursday, March 7, 2024 - link

    Only nvidia is reserving GDDR7 right now, so RTX 5090 is most likely going to be GDDR7
    RDNA 4 is going to be Q3/Q4 with GDDR6 most likely.

    https://www.youtube.com/watch?v=ZpjBHwfIyXs
    Reply
  • Dante Verizon - Friday, March 8, 2024 - link

    No one can say that. Your source is prone to low reliability Reply
  • kn00tcn - Saturday, March 9, 2024 - link

    any examples of that low reliability? companies can change plans if the leak is early enough, and the leak is only as good as how familiar the original source contact is with the topic (who may be in a different department from the topic), so reliability increases when multiple contact quotes are listed and sometimes he lists the confidence level Reply
  • Santoval - Sunday, March 10, 2024 - link

    It is interesting they chose the more conservative PAM3 instead of DDR6X's PAM4. The latter would have doubled bandwidth, clock for clock, but it would require more quite robust error correction than PAM3.

    I think the switch to PAM is the primary reason for the on-die ECC.
    PCIe 6.0 uses PAM4, the first PCIe version based with PAM signaling. Which is why it requires heavy-duty error correction.
    Reply
  • Santoval - Sunday, March 10, 2024 - link

    p.s./edit: Sorry, I meant "GDDR6X". Reply
  • KAlmquist - Tuesday, March 12, 2024 - link

    So the idea is that memory errors are corrected on chip, and transfer errors are corrected buy the GPU memory controller. That avoids the case where a bit is flipped in memory and then the data is further corrupted during transfer to the GPU, resulting in the data seen by the GPU being too badly corrupted to be fixed. Reply

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