The funny thing is, *while gaming* even an RTX 4090 won’t saturate a PCIe 7.0 x1 link. We can probably drop pcie x16 for anything but datacenters cpu/mainboards…Reply
Even PCIe 5.0 requires more expensive motherboards. PCIe 6.0 is, from what I gather, unlikely to make it even more difficult, but PCIe 7.0 will. Maybe it won't make it into consumer devices at all.Reply
Yeah. I don't know if PCI-E 7 will ever make it to consumer boards. If it does it will most certainly used to drive things with fewer lanes. Maybe we will see it as the link between the CPU and the chipset to allow a higher bandwidth connection there but even that seems unlikely. I have no idea where they are going to go for PCI-E 8 if they want to double performance again.Reply
"PCIe 6.0 will have the same 36dB loss as PCIe 5.0, meaning that while trace lengths aren’t officially defined by the standard, a PCIe 6.0 link should be able to reach just as far as a PCIe 5.0 link. Which, coming from PCIe 5.0, is no doubt a relief to vendors and engineers alike."
So PCIe 6.0 can come to consumer products relatively quickly.Reply
There were people saying this about ISA when the 32-bit PCI bus was introduced. People said it about 32-bit PCI when AGP slots became a thing. And not so shockingly, people said that about a previous PCIe generation each time a new standard was introduced.
I'm not sure even a computing minimalist like me typing this on a Pentium n3700-powered laptop would be okay trying to push I/O at ISA speeds today so I would suggest caution in arguing a 7.0 spec won't become useful over its lifespan - assuming trace routing and signaling aren't overly problematic. If that is a problem, then it may just push computing technologies to exist on smaller and more highly integrated PCBs that use fewer lanes and solder down more previously slot-based components which is good in some ways, but it might endanger DIY hobbyists even moreso than has been the case of the last few years. Interestingly, building a desktop PC is almost boiling down to installing a CPU, memory, storage, and a graphics card into fairly idiot-proof shaped expansion slots anyhow and then fist pumping the air to feel like a technological champion so further integration isn't going to do too much harm. Those sorts of people will just fist pump plugging in their wireless keyboard dongle and an HDMI cable instead.Reply
The flip side is that PCIe 4 and 5 resulted in much more expensive mobos than PCIe3 and prior allowed. Another up-ratchet in costs could result in a significant delay or worse before they become offered on consumer systems as manufacturers try to figure out how to make hardware that can support them at non-datacenter price points.Reply
There is a difference though. Many of your first examples were actual differences in different types of busses with enourmous uplifts at a time when there was an actual bottleneck in bandwidth. The last couple of updates in the PCIe standard have shown very little benefit. Heck even the mighty 4090 will only loose 2% when using PCIe 3.0 instead of PCIe 5.0. That is two generations apart with no perceivable difference for the historically most extreme consumer GPU(pricewise). There is a manyfold generational disparity going on. Maybe in 3-4 generations of GPU:s from now we will reach saturationi for something like the current topend bus PCie 5.0.Reply
There's no requirement that the electrical and physical connectors be the same size. We've already seen this with some lower end GPUs that are x16 physical but only x8 or x4 electrically. They take the bigger connector size for both mechanical mounting strength and to access the 75W slot power level only available for an x16 size card; but run fewer lanes to save cost on the PCB and GPU chips.Reply
Technical error "This would allow a 16-lane (x16) connection to support 256 GB/sec of bandwidth in each direction simultaneously, excluding encoding overhead." It should read 512 GB/sec as shown in the image.Reply
The second bullet point at top left explains that the bandwidth shown (in your example 512GB/s) is the sum of the receive and transmit bandwidth, giving 256GB/s Tx + 256GB/s Rx = 512GB/s total bandwidth.Reply
Considering the amount of oscillscopes, spectrum analyzers, and vector network analyzers capable of accurately measuring a 30Ghz signal can be counted on your hands, I'm curious how companies are going to verify and develop PCIe 7.0 chips. I mean, those tools are easily more expensive than a very fancy house here.Reply
I remember carefully notching out the back of a 1x or 4x slot with a Dremel to support a pci-e card with a 16x connector. Made me wonder why pci-e doesn't make every slot smaller than 16x open-ended like that. I think that's better than making every slot the same size as a 16x slot as that takes up a lot more room on the motherboard.Reply
imagine long in the future external hardware interface like thunderbolt or USB have 4 lanes of PCI_E 7, you could connect GPUs and SSDs in a singles cable with minor performance loss. But getting this speeds working for internal short connection is hard, doing it externally on copper wires with be whole different thing. Reply
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bernstein - Thursday, April 4, 2024 - link
The funny thing is, *while gaming* even an RTX 4090 won’t saturate a PCIe 7.0 x1 link.We can probably drop pcie x16 for anything but datacenters cpu/mainboards… Reply
skaurus - Thursday, April 4, 2024 - link
Even PCIe 5.0 requires more expensive motherboards. PCIe 6.0 is, from what I gather, unlikely to make it even more difficult, but PCIe 7.0 will. Maybe it won't make it into consumer devices at all. Replykpb321 - Thursday, April 4, 2024 - link
Yeah. I don't know if PCI-E 7 will ever make it to consumer boards. If it does it will most certainly used to drive things with fewer lanes. Maybe we will see it as the link between the CPU and the chipset to allow a higher bandwidth connection there but even that seems unlikely. I have no idea where they are going to go for PCI-E 8 if they want to double performance again. Replynandnandnand - Friday, April 5, 2024 - link
I didn't realize that, or forgot, but sounds like that's right.https://www.anandtech.com/show/17203/pcie-60-speci...
"PCIe 6.0 will have the same 36dB loss as PCIe 5.0, meaning that while trace lengths aren’t officially defined by the standard, a PCIe 6.0 link should be able to reach just as far as a PCIe 5.0 link. Which, coming from PCIe 5.0, is no doubt a relief to vendors and engineers alike."
So PCIe 6.0 can come to consumer products relatively quickly. Reply
bernstein - Thursday, April 4, 2024 - link
Well overall the rtx4090 is 2% slower on pcie 3 x16 so i guess onnsome games it can saturates a pcie x7 x1 link. But i doubt even a rtx 5090 can saturate a pcie 7 x2 linkhttps://tpucdn.com/review/nvidia-geforce-rtx-4090-... Reply
PeachNCream - Friday, April 5, 2024 - link
There were people saying this about ISA when the 32-bit PCI bus was introduced. People said it about 32-bit PCI when AGP slots became a thing. And not so shockingly, people said that about a previous PCIe generation each time a new standard was introduced.I'm not sure even a computing minimalist like me typing this on a Pentium n3700-powered laptop would be okay trying to push I/O at ISA speeds today so I would suggest caution in arguing a 7.0 spec won't become useful over its lifespan - assuming trace routing and signaling aren't overly problematic. If that is a problem, then it may just push computing technologies to exist on smaller and more highly integrated PCBs that use fewer lanes and solder down more previously slot-based components which is good in some ways, but it might endanger DIY hobbyists even moreso than has been the case of the last few years. Interestingly, building a desktop PC is almost boiling down to installing a CPU, memory, storage, and a graphics card into fairly idiot-proof shaped expansion slots anyhow and then fist pumping the air to feel like a technological champion so further integration isn't going to do too much harm. Those sorts of people will just fist pump plugging in their wireless keyboard dongle and an HDMI cable instead. Reply
DanNeely - Saturday, April 6, 2024 - link
The flip side is that PCIe 4 and 5 resulted in much more expensive mobos than PCIe3 and prior allowed. Another up-ratchet in costs could result in a significant delay or worse before they become offered on consumer systems as manufacturers try to figure out how to make hardware that can support them at non-datacenter price points. ReplyMagnus101 - Saturday, April 13, 2024 - link
There is a difference though. Many of your first examples were actual differences in different types of busses with enourmous uplifts at a time when there was an actual bottleneck in bandwidth.The last couple of updates in the PCIe standard have shown very little benefit.
Heck even the mighty 4090 will only loose 2% when using PCIe 3.0 instead of PCIe 5.0.
That is two generations apart with no perceivable difference for the historically most extreme consumer GPU(pricewise).
There is a manyfold generational disparity going on. Maybe in 3-4 generations of GPU:s from now we will reach saturationi for something like the current topend bus PCie 5.0. Reply
meacupla - Friday, April 5, 2024 - link
I disagree, but only because GPUs are too heavy. They need the length to keep them from snapping the connector even more than they currently do. ReplyDanNeely - Saturday, April 6, 2024 - link
There's no requirement that the electrical and physical connectors be the same size. We've already seen this with some lower end GPUs that are x16 physical but only x8 or x4 electrically. They take the bigger connector size for both mechanical mounting strength and to access the 75W slot power level only available for an x16 size card; but run fewer lanes to save cost on the PCB and GPU chips. Replyballsystemlord - Thursday, April 4, 2024 - link
Technical error "This would allow a 16-lane (x16) connection to support 256 GB/sec of bandwidth in each direction simultaneously, excluding encoding overhead."It should read 512 GB/sec as shown in the image. Reply
rpg1966 - Friday, April 5, 2024 - link
The second bullet point at top left explains that the bandwidth shown (in your example 512GB/s) is the sum of the receive and transmit bandwidth, giving 256GB/s Tx + 256GB/s Rx = 512GB/s total bandwidth. Replyballsystemlord - Friday, April 5, 2024 - link
Thanks! Replyballsystemlord - Friday, April 5, 2024 - link
Considering the amount of oscillscopes, spectrum analyzers, and vector network analyzers capable of accurately measuring a 30Ghz signal can be counted on your hands, I'm curious how companies are going to verify and develop PCIe 7.0 chips. I mean, those tools are easily more expensive than a very fancy house here. ReplyThreska - Friday, April 5, 2024 - link
Most likely have a few companies vested in the technology then mass sell to everyone else. ReplyWardrop - Saturday, April 6, 2024 - link
I remember carefully notching out the back of a 1x or 4x slot with a Dremel to support a pci-e card with a 16x connector. Made me wonder why pci-e doesn't make every slot smaller than 16x open-ended like that. I think that's better than making every slot the same size as a 16x slot as that takes up a lot more room on the motherboard. ReplyEliadbu - Wednesday, April 17, 2024 - link
imagine long in the future external hardware interface like thunderbolt or USB have 4 lanes of PCI_E 7, you could connect GPUs and SSDs in a singles cable with minor performance loss.But getting this speeds working for internal short connection is hard, doing it externally on copper wires with be whole different thing. Reply